At Hot Chips 2026, held at Stanford University from August 24 to 26, Nvidia put its own CPU core under a microscope for the first time. The chip is Vera, an in-house Arm server processor built around 88 custom cores called Olympus. It is the CPU half of the upcoming Vera Rubin platform, and the disclosure matters less for any single number in it than for what it says about Nvidia's strategy: after years of pairing its GPUs with an Arm CPU built mostly from licensed parts, the company has now designed the core itself.
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AMDWhat Nvidia actually disclosed
Vera packs 88 Olympus cores onto one monolithic compute die, a departure from the multi-die, chiplet-style layouts common across the server CPU market. Each core runs two threads through what Nvidia calls spatial multithreading, a scheme that statically partitions a core's resources between two threads rather than sharing them dynamically the way conventional simultaneous multithreading does, which Nvidia says produces more predictable per-thread latency. That puts the total thread count at 176. The cores are compatible with the Armv9.2 instruction set and add FP8 support, and the whole package is paired with LPDDR5X memory delivered over SOCAMM2 modules, supporting up to 1.5TB of capacity and up to 1.2TB/s of bandwidth, alongside 88 PCIe Gen6 lanes, CXL 3.1 support, and a second-generation NVLink-C2C interconnect.
Inside one Olympus core
Nvidia designed Olympus in-house rather than licensing an off-the-shelf Arm core, tuning it for single-thread performance on branch-heavy, pointer-chasing agentic code.
Plus a neural branch predictor and spatial multithreading across 2 threads per core
One of 88 Olympus cores on Vera's monolithic die, 176 hardware threads in total. Execution unit counts as disclosed by Nvidia at Hot Chips 2026.
Inside each core, Nvidia disclosed a 10-wide decode and dispatch front end feeding eight integer ALUs, six vector and floating-point pipelines built around 128-bit Arm SVE, four load units, and two store units, backed by a neural branch predictor and 2MB of L2 cache per core (176MB in aggregate) plus a 164MB shared L3. That is a wide, deep front end by server CPU standards, and it is a deliberate choice: Nvidia designed Olympus for maximum single-thread performance even when every core on the socket is busy, rather than for the raw core density that general-purpose cloud CPUs typically optimize for.
Why build a custom core now
Grace, Nvidia's first Arm server chip, shipped in 2022 with 72 of Arm's own off-the-shelf Neoverse V2 cores, up to 512GB of LPDDR5X, and roughly 546GB/s of memory bandwidth. It was a solid, conventional design: Nvidia licensed a proven Arm core and built the surrounding chip and interconnect around it. Vera keeps the Arm compatibility but throws out the licensed core.
Grace to Vera: from licensed core to in-house design
Grace, Nvidia's first Arm server CPU, used Arm's own Neoverse V2 core. Vera replaces it with Olympus, a core Nvidia designed itself.
Grace specifications from Nvidia's Grace CPU product pages. Vera specifications as disclosed by Nvidia at Hot Chips 2026, August 24, 2026.
The reasoning Nvidia has given, in its own technical writeup and in Hot Chips materials, is that the CPU-side work in a modern AI system does not look like the workloads that server CPUs were designed around. Building and running an AI agent spends real CPU time in Python interpretation, code compilation, static analysis, tool-calling runtimes, graph traversal, and general data preparation, tasks with large instruction footprints, branch-heavy control flow, and long, pointer-chasing dependency chains. Nvidia describes Olympus as having been co-designed across the whole Vera Rubin platform, spanning CPU, GPU, networking, storage, memory, and software together, rather than adapted from a core meant to run generic cloud workloads well. Specific mechanisms it points to include memory renaming, meant to speed up store-to-load chains common in pointer-heavy and graph-traversal code, and a form of value prediction aimed at stable dependency chains in interpreted languages like Python.
That framing lines up with the practical role Vera is meant to play. A GPU rack running agentic AI is not just generating tokens; it is also orchestrating tool calls, managing browser processes for computer-use agents, compiling generated code, and shuttling data in and out of the model. None of that runs well on a GPU, and if the CPU stalls, the (much more expensive) GPUs sit idle waiting on it. A CPU core tuned for single-thread throughput under full socket load is a bet that this host-side work, not raw GPU count, is becoming the bottleneck worth engineering around. It is also the same logic that shows up one layer up the stack, in how the software running on that hardware is built: an agent runtime that can route work to whichever model fits the task, the way Metir AI does across providers rather than locking into one, benefits directly from a host CPU built for exactly this kind of orchestration-heavy, branch-heavy execution.
Reading the performance claims
Nvidia backed the architecture disclosure with several benchmark comparisons, and they deserve the same scrutiny any vendor-supplied number does. On internal SPEC CPU 2026 measurements taken in July 2026, Nvidia reported up to 1.8x higher performance on agentic proxy workloads and roughly 1.5x on data-processing workloads, both measured against unspecified competing x86 CPUs rather than a single named part. In more specific head-to-head testing, Nvidia said Vera compiles the Linux kernel about 22% faster than AMD's 96-core EPYC 9655P, and completes a headless-browser automation workload around 24% faster than the same chip. At the platform level, Nvidia also claimed Vera Rubin systems deliver up to 30 times the total throughput of the prior Grace Blackwell generation in scenarios that demand higher interactivity, a systems-level figure that reflects the CPU, GPU, and interconnect working together rather than the CPU in isolation.
CPU benchmarks are notoriously easy to cherry pick.
The Register, on Nvidia's Vera CPU claims
These are all Nvidia's own numbers, gathered on Nvidia's own test setups, and none of them have been independently reproduced. The Register's technical writeup on the disclosure flagged this directly, also noting that Nvidia's comparison baseline, AMD's Turin-generation EPYC parts, gives Vera an advantageous comparison point since AMD has newer designs in the pipeline. That does not mean the underlying architecture story is wrong, wide front ends and workload-specific execution tuning are real engineering choices with real effects, but the specific multipliers should be read as Nvidia's framing of its own product rather than a settled, third-party result.
Why the CPU story matters here
Almost every headline about the AI buildout is about GPUs: how many, how fast, how much they cost. Vera is a reminder that the chip sitting next to the GPU has become a real design problem in its own right, not a commodity part bolted on to keep data moving. As agentic systems spend more of their time on the CPU side, orchestrating tools, running code, managing state, the economics of an AI data center start to depend on that CPU too. Nvidia designing its own core, rather than continuing to license one, is a bet that this host-side compute is worth owning end to end, the same way it already owns the GPU, the interconnect, and increasingly the networking fabric between racks.
Sources:
- NVIDIA Vera CPU at Hot Chips 2026 | ServeTheHome
- Diving Deeper on NVIDIA's Vera CPU: New Architectural Details and SPEC CPU 2026 Benchmarks | ServeTheHome
- Hot Chips 2026: Nvidia breaks down 88-core Vera CPU, spatial multithreading benchmarked, 1.2 TB/s SOCAMM2 memory, agentic workloads detailed, and more | Tom's Hardware
- NVIDIA Vera Performance and Olympus CPU Microarchitecture | HotHardware
- NVIDIA Vera in Detail: 88 Olympus Cores, 176 Threads, 1.2 TB/s Memory Bandwidth | Igor's Lab
- NVIDIA Vera CPU: Olympus Cores Built for Maximum Single-Thread Performance in Agentic AI | NVIDIA Technical Blog
- A deep dive into Nvidia's Vera CPU and the Olympus cores that power it | The Register
- Nvidia's Vera CPU outpaces AMD EPYC 9655P in Linux kernel compilation at Hot Chips 2026 | CryptoBriefing
- NVIDIA Vera CPU Is Architected For The Agentic AI Era | Wccftech
- NVIDIA Grace CPU Superchip | NVIDIA
Image credits
Header image: the NVIDIA sign outside the company's headquarters campus on Scott Boulevard, Santa Clara, California, by Will Buckner via Wikimedia Commons, licensed under CC BY 2.0. In-body photograph: NVIDIA founder and CEO Jensen Huang at Stanford University's CS 153 course on April 30, 2026, via Wikimedia Commons, licensed under CC BY-SA 4.0. This photograph predates and is unrelated to the Hot Chips 2026 presentation; no public photograph of that specific talk was available at publication, so it is used here only for editorial context on Nvidia's leadership.