Google TPU 8tx and 8i Max: Confidential Compute and Memory-Heavy Chips Explained (2026)

On November 9, 2026, Google announced two additional systems in its eighth-generation Tensor Processing Unit family: the TPU 8tx, built for running AI on private or sensitive data, and the TPU 8i Max, built for workloads limited by memory rather than raw compute. They complete a four-system lineup, alongside the TPU 8t and TPU 8i unveiled at Cloud Next in April 2026. Google says it is the first year it has introduced four TPU systems.

The more interesting question than the specifications is what the split says about where AI hardware demand is moving. Training headlines dominated the first wave of accelerators. These two chips are aimed at inference and deployment constraints: data that cannot leave a trust boundary, and agents whose working memory outgrows a single chip.

4eighth-generation TPU systems8t, 8i, 8tx and 8i Max

2xcompute, on-chip memory and bandwidth8i Max vs 8i

50%maximum latency cut8tx vs 8t, per Google

~100TPU customersper Google's Amin Vahdat

Google

Google Cloud

NVIDIA

AMD

Google's TPUs compete with Nvidia GPUs for AI workloads. The 8tx pairs TPU silicon with AMD's fifth-generation EPYC processors.

TPU 8tx: confidential compute for private data

The 8tx uses the same silicon as the TPU 8t training chip, paired with AMD fifth-generation EPYC processors and Google's Boardfly network. Its distinguishing feature is hardware-level isolation: Google describes it as offering "hardware-level confidential compute for private fine-tuning and secure agent execution," keeping customer data and model weights isolated while the chip runs.

Google positions it for governments and regulated businesses. It can also handle smaller training jobs, so a team can fine-tune a model on private data without moving that data between clusters. Google says the network design cuts latency by up to 50% against the TPU 8t, and Decrypt reports the company claims almost no performance penalty for the added protection.

Two qualifiers apply. The 50% figure is a ceiling ("up to"), not a typical result. And confidential computing protects data from the infrastructure operator and other tenants. As Decrypt notes, it does not stop a poorly designed AI agent from mishandling data it is legitimately allowed to access, which is a separate class of risk.

TPU 8i Max: two chips in one package

The 8i Max combines two TPU 8i chips in a single package. Against the standard 8i it doubles computing power, on-chip memory and memory bandwidth, and fits twice as much silicon in the same rack space, which raises compute per square metre and per watt.

What the two new TPU variants change, relative to their base chips

Multiples as described by Google and reported by The Next Web.

8i Max: compute, on-chip memory and memory bandwidth each doubled against the 8i. 8tx: network latency cut by up to 50% against the 8t (a ceiling, not a typical figure).

Google names memory-bound work as the target: agents working across entire codebases and systems analyzing hours of video. The logic is that inference for long-context workloads spends much of its time moving key-value state in and out of memory, so a chip that holds more of that state on-package waits less. Doubling everything together, rather than only memory, suggests Google is trading rack density for fewer cross-chip transfers.

Alongside the chips, Google open-sourced TPU Sync, software that moves AI working memory between chips, servers and storage. Google claims reductions of more than 90% in certain data-transfer delays and response startup times, a figure that should be read as workload-specific until independent tests appear.

A Google TPU v4 board showing four liquid-cooled TPU packages — A TPU v4 board with four liquid-cooled TPU packages, an earlier generation shown for context only. The 8tx and 8i Max are newer designs and are not depicted. Image from Jouppi et al., arXiv 2304.01433, CC BY 4.0.

What Google has not said

The announcement is short on the numbers buyers normally need:

No pricing and no release dates for either chip.
No comparison with Nvidia's current parts. Decrypt notes Google's performance figures compare the new systems with earlier Google hardware, not Nvidia's latest products. Any claim that the chips beat Nvidia hardware is therefore not supported by the announcement itself.
No absolute specifications in the coverage reviewed, such as memory capacity or peak throughput, only multiples relative to sibling chips.

The Bloomberg framing, relayed by The Neuron, is that the launch intensifies Google's rivalry with Nvidia. That is a reasonable reading of intent, but a rivalry in product positioning is not evidence of performance parity.

The strategic read: a merchant-silicon business

Google's chief technologist for AI and infrastructure, Amin Vahdat, said in a blog post that the TPU business has nearly 100 customers, including frontier AI labs, trading firms, retailers and universities. Decrypt adds that Google increasingly sells TPU access to outside companies, including on-premises customers. Those two facts matter more for market structure than any single chip: a TPU line sold to many buyers behaves like a merchant accelerator business, even though the chips remain tied to Google's own software stack and cloud.

The software side is the usual constraint for non-Nvidia silicon. Google's open-source TorchTPU project aims to let developers run PyTorch and Hugging Face models on TPUs without rewriting their applications, which targets the migration cost that has historically limited adoption.

In accelerator markets, the chip is rarely the hard part. The software and the trust model around it usually decide adoption.
On what the 8tx and 8i Max signal

What to watch

Pricing and availability. Until Google publishes either, procurement teams cannot compare cost per token against GPU alternatives.
Independent inference benchmarks on long-context agent workloads, the case the 8i Max is designed for.
Regulated-sector adoption of the 8tx, which will show whether hardware-level isolation satisfies compliance teams in practice.
Whether other labs and clouds follow with confidential-compute accelerators of their own.

For application builders the near-term takeaway is simpler. Hardware diversity underneath models is increasing, and the model a team depends on may run on very different silicon from one quarter to the next. Keeping applications portable across models and providers, as multi-model workspaces such as Metir do, reduces exposure to any single hardware or vendor path.

Sources:

Image credits

Header and in-body image: Google TPU v4 board, from Jouppi et al., "TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings" (arXiv 2304.01433), via Wikimedia Commons, licensed under CC BY 4.0. An earlier-generation chip, used for illustration only.